SPI Master¶
The xPico 600 gateway provides a Serial Peripheral Interface bus in master mode. SPI is a serial communication interface used to communicate between devices over short distances. It uses a master/slave architecture in which a master device can communicate with multiple slave devices.
In order to set up SPI Master, configure the SPI settings to match your device's configuration. Use the SPI API through the SDK by setting Protocol to None. See the SDK User Guide for more information. Use SPI with the Monitor feature by setting Protocol to Monitor.
In high-speed mode, SPI master will operate at a speed between 1221 Hz and 20 MHz. Otherwise it will operate at a speed between 500 Hz and 50 kHz.
To operate in high-speed mode, SPI must be configured with the following specific settings. If any settings differ, it will not operate in high-speed mode.
High-speed mode configuration:
- CS Active: Low
- Idle Clock Level: Low
- Clock Edge: First
SPI 1 Configuration Settings¶
The following table describes the Web Manager SPI 1 configuration settings. In Web Manager, go to SPI > SPI 1 > Configuration.
Important
After enabling SPI 1, you must enable the SPI.CS, SPI.MISO, and SPI.SCK Configurable Pins roles. See Configurable Pin Manager for more information.
Links to the equivalent settings for the CLI and XML reference are listed below.
| Settings | Description |
|---|---|
| Name | This setting is for display purposes only and may be up to 25 characters. It sets a user-defined name for the SPI interface. |
| State | This is the operational state of SPI and can be Enabled or Disabled. The default is Disabled. |
| Protocol | The protocol can be set to Monitor or None. The default is Monitor. Setting Protocol to Monitor allows you to use the Monitor feature to query information from the SPI interface. Setting it to None will allow you to use the SPI API. |
| Target Speed | This sets the target clock speed of the SPI. By default, this is set to <Minimum>. If the value is blanked, it will be set to <Minimum>. If SPI master is configured for high-speed mode (CS Active set to Low, Idle Clock Level set to Low, and Clock Edge set to First), then Target Speed can be between 1221 Hz and 20 MHz. If SPI master is not in high-speed mode, then Target Speed can be configured between 500 Hz and 50 kHz. |
| CS Active | Chip Select Active can be set to Low or High. Low means CS will idle at a high level and be active at a low level. High means CS will idle at a low level and be active at a high level. Default is Low. |
| Idle Clock Level | Idle Clock Level is also known as Clock Polarity or CPOL. This can be set to Low or High. Low means that the idle clock is at a low level, equivalent to CPOL=0. High means that the idle clock is at a high level, equivalent to CPOL=1. Default is Low. |
| Clock Edge | Clock Edge is also known as Clock Phase or CPHA and selects the clock edge for latching data. It can be set to First or Second. Default is First. First means each bit is latched on the first edge of the clock, equivalent to CPHA=0. When Idle Clock Level is Low, data is latched on the rising edge. When Idle Clock Level is High, data is latched on the falling edge. Second means each bit is latched on the second edge of the clock, equivalent to CPHA=1. When Idle Clock Level is Low, data is latched on the falling edge. When Idle Clock Level is High, data is latched on the rising edge. |
| Bits Per Word | Choices are 8 and 16. Default is 8. |
| First Transfer | Selects the first transfer bit of each word. Choices are Most Significant Bit and Least Significant Bit. Default is Most Significant Bit. |