General Purpose I/O (GPIO) Interface Pins¶
The xPico 600 GPIO interface pins are described in the table below.
xPico 600 GPIO Interface Pins
| Pin Name | LGA Pin No. | M.2 Pin No. | I/O1 | Description |
|---|---|---|---|---|
| CP1 | 15 | 62 | DIO | Configurable I/O |
| CP2 | 10 | 23 | DIO | Configurable I/O |
| CP3 | 11 | 50 | DIO | Configurable I/O |
| CP4 | 12 | 56 | DIO | Configurable I/O |
| CP5 | 36 | 58 | DIO | Configurable I/O |
| CP6 | 35 | 60 | DIO | Configurable I/O |
| CP7 | 14 | 54 | DIO | Configurable I/O |
| CP8 | 13 | 59 | DIO | Configurable I/O |
| CP9 | 51 | 16 | DIO | Configurable I/O |
| CP10 | 45 | 6 | DIO | Configurable I/O |
| CP11 | 18 | 21 | DIO | Reserved GPIO |
| CP12 | 53 | 44 | DIO | Reserved GPIO |
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Refer to the I/O Parameter Definitions table for an explanation of these abbreviations. ↩